1. Field of the Invention
This invention relates to integrated circuit structures and processes for fabricating them, and in particular to a method of fabricating polycrystalline silicon resistors in integrated circuit structures using out diffusion, and the resulting product.
2. Description of the Prior Art
The use of polycrystalline silicon to fabricate interconnections in integrated circuit structures, and to provide resistors for such structures is now well-known. Also well-known are various techniques for fabricating regions of oxidized isolation to electrically isolate individual or groups of active and passive devices from each other. One such technique is taught in U.S. Pat. No. 3,648,125 issued to Douglas L. Peltzer.
In conventional integrated circuit fabrication processes polycrystalline silicon resistors are fabricated in desired locations by the deposition of doped polycrystalline silicon utilizing conventionally available chemical vapor deposition apparatus. According to such techniques doped polycrystalline silicon is deposited across the upper surface of a wafer and then removed from undesired locations using well-known photolithographic and etching techniques. Another well-known technique for fabricating polycrystalline silicon resistors is to deposit undoped polycrystalline silicon and then dope it using ion implantation or diffusion processes. Unfortunately, each of these prior art techniques for fabricating such resistors suffers from the disadvantage of requiring additional process steps to create the resistors. As is well-known each additional process step means higher cost for the final product and provides additional opportunity for defects, misalignment, or other difficulties which reduce the overall yield of functional integrated circuits from such processes. Furthermore, such processes do not take advantage of previous process steps to enable formation of the desired resistors.